How is memory typically mapped to the different chips on a DIMM, and what are the typical timing characteristics, broadly speaking? For example, are bytes/words whose address is i mod 8 typically on chip i? In the case of reads, are results returned first from chip 0 (after the RAS and CAS latencies), then promptly on subsequent cycles from each of the next 7 (or 15) chips? How about from other DIMMs on the same motherboard?
posted by espertus on Nov 15, 2009 - 3 answers

Which is better, one 4GB stick, or two 2GB sticks of DDR2 RAM in my Laptop? [more inside]
posted by brenton on Apr 20, 2009 - 8 answers

Windows XP PC crashes and burns when four identical sticks of RAM are installed but Memtest86 shows no errors. [more inside]
posted by shinybeast on Oct 16, 2008 - 7 answers

What are the advantages/disadvantages of using 2Rank DIMMS as opposed to standard DIMMs? [more inside]
posted by pmbuko on May 1, 2006 - 2 answers